- Use the existing single/dual-channel state when available, as changing it
doesn't appear to work out.
- Set the power state of the CLKB and B0-B3 pairs according to whether
choose to go dual-channel or not.
- Restore the LVDS register at the appropriate point (before DPLLs are
re-programmed.
For some reason, certain chips don't correctly enable the SDVO hardware when
this register is written only once. We're following what the BIOS code does
and writing it twice now, but with extra posting reads to boot. Yes, this is
cult-and-paste, but it fixes problems found on deployed hardware.
Linux cannot allocate a large fixed buffer for the HW cursors as needed for
FreeBSD; instead, allocate four separate buffers. The code now prefers to
allocate one buffer (less overhead) and falls back to separate buffers only
when necessary.
Changing this value slows the entire I2C bus down, making it far more
reliable on older monitors. Note the same change has been made in the core X
server code; this change is included here to ensure that older X servers
work reliably with this driver.
Now, we allocate one single block of memory for cursors, and either succeed or
fail once, rather than trying to support partial fallback modes that generally
resulted in pain due to being untested. In particular, this fixes cursors on
FreeBSD, which only allowed one large physically-contiguous allocation.
This currently only matters when the DRM memory manager is not available and
Option "Legacy3D" "off" is specified, but that hasn't always been the case and
might change again in the future.
This gets correct clocks detected on most harware. The SSC is always assumed
to be 66Mhz, which may not be true, but we'll fix that when we find example
hardware.
Also, add code for setting the encoder power state like the BIOS does, but this
doesn't appear to work. We do much more than the BIOS does in powering things
down, so perhaps that's interfering somehow.
With the new mode setting code, rotation is handled outside of the driver,
so the old usage of the 'shadow' module is no longer needed. Code to
initialize the crtc structures has been moved out of the driver and into the
modes code.
The previous code claimed to set the depth buffer up as Y tiled, but due to
lack of implementation in SetFence, it ended up being X tiled. Actually
setting the Y tiling flag in the new version broke the depth buffer, so just
switch the depth buffer to X tiling, which appears to work fine.
Wang Zhenyu
Eric Anholt
Michel Dänzer
Keith Packard
Keith Packard
Dave Airlie
Alan Hourihane