Commit Graph

38 Commits

Author SHA1 Message Date
Chris Wilson 4a27dd287c uxa: Make the glamor/uxa transition more verbose
And so hopefully make it clearer. In the process we restore the flushing
behaviour for UXA back to before the glamor intervention.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-11-21 13:02:34 +00:00
Zhigang Gong fbabe60f48 glamor: Initial commit to introduce glamor acceleration.
Added one configuration option --enable-glamor to control
whether use glamor. Added one new file intel_glamor.c to
wrap glamor egl API for intel driver's usage.
This commit doesn't really change the driver's control path.
It just adds necessary files for glamor and change some
configuration.

Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-off-by: Zhigang Gong <zhigang.gong@linux.intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-11-17 01:10:21 +00:00
Chris Wilson 3771387ad1 Compile out UXA if so desired
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-11-16 22:15:39 +00:00
Chris Wilson 2174f84015 uxa: Remove caching of surface binding location
If the pixmap were to be used multiple times within a batch with
mulitple formats, the cache would only return the initial location with
the incorrect format and so cause rendering glitches. For instance, GTK+
uses the same pixmap as an xrgb source and as an argb mask in order to
premultiply and composite in a single pass. Rather than introduce an
overly complication caching (handle, format) mechanism, kiss and remove
the invalid implementation.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=40926
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-11-03 20:41:31 +00:00
Chris Wilson 46f97127c2 snb,ivb: Workaround unknown blitter death
The first workaround was a performance killing MI_FLUSH_DW after every
op. This workaround appears to be a stable compromise instead, only
requiring a redundant command after every BLT command with little
impact on throughput.

Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=27892
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=39524
Tested-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-10-17 13:09:17 +01:00
Chris Wilson 0a74cd77a3 video: check that the pixmap exists before use
Now, the pixmap being used is meant to the Screen pixmap and by rights
that has to exists in a GPU buffer! Evidence contrary to the above
exists and so we had better check that we have a bo before using...

Reported-by: Toralf Förster <toralf.foerster@gmx.de>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=40439
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-08-29 10:41:26 +01:00
Chris Wilson 97e9557619 intel: Restore manual flush for old kernels
Daniel Vetter pointed out that the automagic flush by the kernel for the
busy-ioctl was only introduced upstream in 2.6.37. So we still need to
manually emit a flush on old kernels.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-04-08 13:38:48 +01:00
Chris Wilson 6f104189bb Take advantage of the kernel flush for dirty bo in the busy ioctl
Rather than just creating and submitting a batch that simply contains a
flush in order to periodically ensure that rendering reaches the
scanout, we can simply ask the kernel whether the scanout is busy. The
kernel will then submit a flush on our behalf if it is dirty, which
takes advantage of the kernel's dirty state tracking.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-04-04 19:24:30 +01:00
Daniel Vetter f660df2cb4 Cleanup gen2 tiling confusion
A tile on gen2 has a size of 2kb, stride of 128 bytes and 16 rows.

Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2011-03-29 18:02:50 +02:00
Chris Wilson 0bb1a5f19e Update priv->stride after bo reallocation
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-03-09 08:26:44 +00:00
Daniel Vetter d21d781466 Fix relaxed tiling on gen2
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2011-02-22 18:33:04 +01:00
Chris Wilson 3e28a0c0b4 Create the UXA generational resources during screen create
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-01-20 15:13:33 +00:00
Chris Wilson 968151898b Remove unused GTT/Map sizes and addresses
These have been made obsolete by KMS and GEM.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-01-08 19:46:36 +00:00
Chris Wilson 53fbc9f176 Don't replace the scanout bo through PutImage
As the bo may be pinned for either use by the scanout or through sharing
with another application, under those circumstances we cannot replace
the bo itself but must force the blit for PutImage.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=31367
Reported-and-tested-by: Bjørn Mork <bjorn@mork.no>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-30 16:48:52 +00:00
Chris Wilson 875d482835 i830: amalgamate consecutive composites into a single primitive
Improve aa10text on i845 from 218kglyphs/s to 234kglyphs/s

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-23 19:42:19 +00:00
Chris Wilson d90c8f4d0b i965: Invalidate pixmap binding location on reuse.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-07 19:22:30 +00:00
Chris Wilson 4a186a6123 Always flush the batch before blocking for new X requests
This should prevent any lag when waiting upon user input, for example
whilst logging in with gdm.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-07 16:56:57 +00:00
Chris Wilson e8f41c3710 uxa: Prevent reading past the last byte on upload/download
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=29752
Reported-by: Sergey Samokhin <prikrutil@gmail.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-05 22:36:21 +00:00
Chris Wilson 3cc74044ce i965: Amalgamate surface binding tables
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-03 14:05:30 +00:00
Chris Wilson a1fa0dbfda i965: Upload an entire vbo in a single pwrite, rather than per-rectangle
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-03 14:05:30 +00:00
Chris Wilson cc930a3761 uxa: Relax fencing some more for gen3
Allow fenced allocations even for small pixmaps if the kernel supports
relaxing fencing (where only the used pages are allocated).

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-14 19:47:00 +00:00
Zou Nan hai 42363134bd Support BLT acceleration on gen6
Signed-off-by: Zou Nan hai <nanhai.zou@intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-01 10:38:37 +00:00
Eric Anholt a1c54f6964 Fix violation of gen6 requirements for depthbuffer tiling.
In general, demoting of tiling of DRI2 buffers seems dubious, as we've
got various bits of functionality that won't all work together unless
buffers are tiled as expected.  This just covers one instance of the
problem, caught by assertions in Mesa.

Fixes:
fbo-1d
fbo-d24s8.
glean/readPixSanity
glean/rgbTriStrip
glean/scissor
2010-10-18 14:39:25 -07:00
Chris Wilson 4083197a44 Include a chipset generation number to clarify device specific paths.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-10-07 13:26:07 +01:00
Chris Wilson 707901bf98 uxa: Re-enable acceleration.
A side-effect of discriminating offscreen based on the devPrivate.ptr
was that it broke uxa_finish_access and so after any fallback to s/w on
a Pixmap, it remained in software for the reminder of its life.

Introduce an explicit boolean to mark whether or not hardware
acceleration is enabled for a pixmap (with a GEM buffer).

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-10-06 12:17:14 +01:00
Chris Wilson 54f545e063 Revert "Clear pixmap->devPrivate.ptr [regression in 7c7294e]"
This reverts commit 48b4e224297fa807be0e2bc7a67bf7e94579e8de.

The better fix is to manually mark the pixmap when acceleration is and
is not permitted. Whilst the devPrivate.ptr are invalid upon creation,
it is not worth carring code that serves no purpose.
2010-10-06 12:17:14 +01:00
Chris Wilson d1925deedd Clear pixmap->devPrivate.ptr [regression from 7c7294e]
ModifyPixmapHeader(pixdata = NULL) does not clear the
pixmap->devPrivate.ptr, instead the NULL value is interpreted as meaning
to keep the current value. (This is similar to the interpretation of the
other invalid values like depth=-1 which also mean not to change the
current property). However pixadata=NULL is indeed a valid value, and in
7c7294e, devPrivate.ptr == NULL was used to differentiate a bo pixmap
from a system pixmap. Except that we never did clear the ptr as
intended, and so X would immediately crash.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-10-06 00:23:57 +01:00
Chris Wilson 7c7294ec00 shadow+dri2: Allow dri2 to be independently enabled with shadow
To enable DRI we create GEM buffers for the client to render into with
hardware acceleration. In order to maintain coherency between any 2D
render operations with the independent 3D clients (this includes the
reading of 2D rasterisation by the direct rendering client, e.g.
compiz using texture_from_pixmap) we need to replace the shadow pixmap
with the GTT mapping. Therefore 2D rendering to a DRI buffer will be to
uncached memory and thus penalised -- but the direct rendering clients
will have full hardware acceleration.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-10-04 20:24:36 +01:00
Chris Wilson 516d235c5b Split shadow handling routines to their own file.
This is about to get messy, so separate out the shadow from the normal
code.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-10-04 11:10:57 +01:00
Chris Wilson 08c2caca48 uxa: Apply source clipping to blits
Yes, this should be done in the higher layers. Yes, I have written code
to that. No, it is not ready, hence add the sanity check to the
SRC_COPY_BLT.

This isn't the first report that I've seen, but will be the last.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=30120
Reported-by: rezbit.hex@gmail.com
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-13 01:10:48 +01:00
Chris Wilson ae160d7fbf shadow: Simply modify the Screen pixmap header
This is a slightly less risky strategy than having to remember to update
all pointers to the old Screen pixmap.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-10 13:19:12 +01:00
Chris Wilson 2b96c18165 Enable a shadow buffer and disable GPU acceleration.
An attempt to workaround the incoherency in gen2 chipsets, we avoid
using dynamic reallocation as much as possible.

The first step is to disable allocation of pixmaps using GEM and simply
create them in system memory without a backing buffer object. This
forces all rendering to use S/W fallbacks.

The second step is to allocate a shadow front buffer and assign that to
the Screen pixmap. This ensure that the front buffer remains in the GTT
and pinned for scanout. The shadow buffer will be rendered to in the
normal fashion via the Screen pixmap, and be marked dirty. In the block
handler, the dirty shadow buffer is then blitted (using the GPU) over
the front buffer. This should completely avoid having to move pages
around in the GTT and avoid incurring the wrath of those early chipsets.
Secondly, performance should be reasonable as we avoid the ping-pong
caused by the small aperture and weak GPU forcing software fallbacks.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-08 13:33:37 +01:00
Chris Wilson 501e78b009 Force use of GTT and fence registers for mapping tiled objects
If the buffer object is tiled, we need to use the fence registers to
perform the appropriate untiling for CPU access. Ensure that we always
take this path for tiled objects, regardless of their size.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-04 12:37:39 +01:00
Chris Wilson 42312bbd8c Remove accel_pitch_alignment
This has to be 64 on all generations currently, so replace the variable
with a constant.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-08-22 09:54:18 +01:00
Matt Turner 7f86e5b5da Replace ROUND_* macros with ALIGN.
Signed-off-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-08-22 09:52:54 +01:00
Dave Airlie 7a4bfaf424 intel: respect tiling disable.
For testing purposes its nice to know tiling isn't being used anywhere.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-07-20 11:31:48 +10:00
Chris Wilson 28c0ca676c Remove unused inclusion of <sys/mman.h>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-06-25 13:40:22 +01:00
Chris Wilson 5c663ce844 Rename common infrastructure to the intel namespace.
After splitting out the i810 driver into its own legacy directory, we
can identify the common routines not as i830 but as intel. This
clarifies the code which *is* i830 specific.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-06-25 13:18:01 +01:00