Commit Graph

2974 Commits

Author SHA1 Message Date
Eric Anholt 9656d329e4 Put back the pitch alignment for new framebuffers.
I confused a dead assignment with dead code, because one of the args
to the function was an outvalue.  Fixes corruption under compiz.

Bug #26814.
2010-03-08 14:40:50 -08:00
Jesse Barnes b71ca26a02 DRI2: fixup ScheduleWaitMSC similarly to ScheduleSwap
My merge of Mario's patch for this was botched.  Fix it up so that OML
waits work correctly, and remove a bogus warning from ScheduleSwap.

Reported-by: Mario Kleiner <mario.kleiner@tuebingen.mpg.de>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2010-03-08 11:28:59 -08:00
Matt Turner 06b54e089e Don't check for Xinerama.
It doesn't seem to be used anywhere, so don't require it.

CC: Eric Anholt <eric@anholt.net>
CC: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Matt Turner <mattst88@gmail.com>
2010-03-08 10:41:57 -08:00
Robert Hooker 8ece6cf5af Fix build against xserver 1.6 branch.
Signed-off-by: Robert Hooker <sarvatt@ubuntu.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-03-06 19:51:59 +00:00
Mario Kleiner 1cd5564202 DRI2: handle target_msc, divisor and remainder properly in DRI2ScheduleSwap
The current code in I830DRI2ScheduleSwap() only schedules the correct
vblank events for the case divisor == 0, i.e., the simple
glXSwapBuffers() case.

In a glXSwapBuffersMscOML() request, divisor can be > 0, which would go
wrong.

This modified code should handle target_msc, divisor, remainder and the
different cases defined in the OML_sync_control extension correctly for
the divisor > 0 case.

It also tries to make sure that the effective framecount of swap
satisfies all constraints, taking the 1 frame delay in pageflipping mode
and possible delays in blitting/exchange mode due to
DRM_VBLANK_NEXTONMISS into account.

The swap_interval logic in the X-Servers DRI2SwapBuffers() call expects
the returned swap_target from the DDX to be reasonably accurate,
otherwise implementation of swap_interval for the glXSwapBuffers() as
defined in the SGI_swap_interval extension may become unreliable.

For non-pageflipped mode, the returned swap_target is always correct due
to the adjustments done by drmWaitVBlank(), as DRM_VBLANK_NEXTONMISS is
set.

In pageflipped mode, DRM_VBLANK_NEXTONMISS can't be used without severe
impact on performance, so the code in I830DRI2ScheduleSwap() must make
manual adjustments to the returned vbl.reply.sequence number.

This patch adds the needed adjustments.

Signed-off-by: Mario Kleiner <mario.kleiner@tuebingen.mpg.de>
2010-03-05 12:52:47 -08:00
Mario Kleiner 13119ffc03 DRI2: make MSC waits handle specific target_mscs and divisor/remainders
Previous code only handled divisor == 0 case correctly. This should
honor a given target_msc for the divisor > 0 case and handle the
(msc % divisor) == remainder constraint correctly.

Signed-off-by: Mario Kleiner <mario.kleiner@tuebingen.mpg.de>
2010-03-05 12:52:47 -08:00
Jesse Barnes b6e0b92f39 DRI2: handle offscreen drawables better at swap time
If a drawable isn't visible due to DPMS or redirection, we'll just blit
it rather than schedule a swap event.  However, we didn't reset the
target_msc, so the swap target we receive from the server could get out
of sync with the vblank count of the drawable's display.  So at DPMS on
time, the swap target would be the last good vblank count plus some
large number (since the swaps won't have been throttled).

Solve this by zeroing out the swap target like we should when we fall
back to a blit.  Also make the kernel error cases more friendly by
making them fall back to blits too.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2010-03-05 12:52:47 -08:00
Chris Wilson 54ac4e2df9 Rate limit batch buffer error.
Once we hit this error it's unlikely that we're coming back - so don't
flood the logs with redundant information.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-03-05 09:24:33 +00:00
Daniel Vetter 066d9b64ee i915 XvMC: kill dead code
This kills one wip remnant from my i830_memory cleanup and the last
remainings of the subpicture support.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2010-03-04 14:33:39 -08:00
Eric Anholt 7b7c724da9 Remove remaining fbOffset setting.
In the long long ago, fbOffset was used for DGA.  The server now has
only one reference to fbOffset, a leftover setting of it in fbdevhw.
We can safely ignore it now, which is good since we weren't updating
it in other places where the front buffer offset could change.
2010-03-04 11:25:14 -08:00
Eric Anholt 15026d64d3 Remove a piece of fbOffset cruft from non-DRM support. 2010-03-04 11:25:14 -08:00
Eric Anholt e8e6152892 Remove i830_allocate_2d_memory() now that it only called one function. 2010-03-04 11:25:14 -08:00
Eric Anholt e37b562083 Init CRTC cursors with CRTC setup instead of i830_memory. 2010-03-04 11:25:12 -08:00
Eric Anholt a36bdaba61 Remove intel_sync() at teardown time.
The kernel's still running after we're gone.  This didn't matter.
2010-03-04 10:13:34 -08:00
Eric Anholt 4ada6d7a85 Remove 3D state clobber on EnterVT, and always clobber at batch start.
We know that it's clobbered at each batchbuffer, anyway.  And even if
this server isn't running DRI2, it can still be clobbered at batch
start in the KMS world.
2010-03-04 10:13:34 -08:00
Eric Anholt d92d42303e Remove pre-2.6.29 error message handling since we require KMS. 2010-03-04 10:13:34 -08:00
Eric Anholt faecd155c4 Move batch and 965 render state setup/teardown to screen init/close.
Whether we're VT switched or not shouldn't impact rendering.
2010-03-04 10:13:34 -08:00
Carl Worth 74e2b69a31 i915_hwmc: Remove dead code.
Daniel recently identified this code as unneeded (with an #if 0).
Here we take the next step and remove it entirely.
2010-03-04 09:51:03 -08:00
Carl Worth 1cc35a8ba4 uxa: Fix type mismatch to avoid compiler warning.
The code was using uint32_t where an XID (currently an unsigned long)
was specified in the prototype. Use XID to avoid both the warning and
any potential problem.
2010-03-04 09:46:33 -08:00
Carl Worth 1d6537ec57 i830_video: Remove unused variable.
Certainly just a little leftover from the recent rewrites.
2010-03-04 09:39:28 -08:00
Daniel Vetter 57c0043b9a Xv: fixup relocation in i965_video.c
The previous code made no sense, (multiplying an offset by 4 is
meaningless). It could have onlt worked with the offset being
fortuitously 0.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Carl Worth <cworth@cworth.org>
2010-03-04 09:38:38 -08:00
Daniel Vetter e606be463f i830_memory: rip out the remainings of the old allocator
Yeah!

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Carl Worth <cworth@cworth.org>
2010-03-04 09:38:38 -08:00
Daniel Vetter 371be65fb7 XvMC: kill the pinned batchbuffer in the ddx code
It's been unused for quite a while.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Carl Worth <cworth@cworth.org>
2010-03-04 09:38:38 -08:00
Daniel Vetter d5a20c81ab i915 XvMC: kill pinned surface buffer in the ddx code
Like with the per context stuff, also drop the now artificial limit
on surfaces. Again, with that gone, a lot of code can be deleted.

Reviewed-by: Carl Worth <cworth@cworth.org>
2010-03-04 09:38:38 -08:00
Daniel Vetter e6eb257ad3 i915 XvMC: kill pinned per-context buffers in the ddx code
There's now not a reason anymore to limit the number of active contexts.
So kill this accounting, too.

With that all gone, per-context state in the ddx is nil, so rip out
all associated code.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Carl Worth <cworth@cworth.org>
2010-03-04 09:38:38 -08:00
Daniel Vetter 47ae1181f6 i915 XvMC: don't stall the cpu anymore
Proper bo management ensures that the cpu doesn't step on buffers
used by the gpu. Drop the now unnecessary synchronization.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Carl Worth <cworth@cworth.org>
2010-03-04 09:38:38 -08:00
Daniel Vetter 9bba123c5f i915 XvMC: drop superflous MI_FLUSH
Cache coherency is now fully under the control of gem.

For lack of hw documentation, I had to find out the correct cache
placements by trial and error:

Backward and forward surfaces: I915_GEM_DOMAIN_RENDER
Correlation data:              I915_GEM_DOMAIN_SAMPLER

Changing any of them leads to visual corruptions, so I think these
are the correct ones.

Reviewed-by: Carl Worth <cworth@cworth.org>
2010-03-04 09:38:38 -08:00
Daniel Vetter b11623f20e i915 XvMC: switch surfaces to drm_intel_bo
Now the last user of the fixed buffers provided by the ddx is gone!

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Carl Worth <cworth@cworth.org>
2010-03-04 09:38:38 -08:00
Daniel Vetter b7f79bfd40 i915 XvMC: switch corrdata buffer to drm_intel_bo
It works!

v2: Correlation data needs to be in the render cache!

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Carl Worth <cworth@cworth.org>
2010-03-04 09:38:37 -08:00
Daniel Vetter 62846d88d4 i915 XvMC: switch msb to drm_intel_bo
Like for the static indirect state buffer.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Carl Worth <cworth@cworth.org>
2010-03-04 09:38:37 -08:00
Daniel Vetter d27955c697 i915 XvMC: switch sis to drm_intel_bo
I've decided to allocate a new buffer for every render command, to
prevent stalling for the gpu. libdrm bo reuse should take care of
not wasting memory in case the buffer is not busy.

Also always emit the full state, it's not worth it to complicate
the code over a few stores to wc memory.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Carl Worth <cworth@cworth.org>
2010-03-04 09:38:37 -08:00
Daniel Vetter 3203c66fbf i915 XvMC: switch load_indirect_render_emit to batchbuffer macros
Like with one_time_state_emit, this preps for relocatable bo's.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Carl Worth <cworth@cworth.org>
2010-03-04 09:38:37 -08:00
Daniel Vetter d30decae6a i915 XvMC: switch psc to drm_intel_bo
Like with the sampler state buffer.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Carl Worth <cworth@cworth.org>
2010-03-04 09:38:37 -08:00
Daniel Vetter b543c355f4 i915 XvMC: switch psp to drm_intel_bo
Like with the sampler state buffer.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Carl Worth <cworth@cworth.org>
2010-03-04 09:38:37 -08:00
Daniel Vetter 18c364084c i915 XvMC: switch ssb to drm_intel_bo
This also starts to kill the last remnants of the support for
physical addresses for the indirect state buffers. With gem this
would need kernel support (in the form of a new reloc type in
execbuf2).

This does not change the ABI between ddx and client libIntelXvMC.
I've decided to do this in one swoop when all the buffer rework is
done.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Carl Worth <cworth@cworth.org>
2010-03-04 09:38:37 -08:00
Daniel Vetter fc9e44f019 i915 XvMC: kill last_flip and last_render
Seems to be a remnant from i810 XvMC support. last_flip is always 0,
so serves no real purpose anymore. Kill it and the associated code.

With last_flip gone, last_render also lost its purpose. Kill it, too.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Carl Worth <cworth@cworth.org>
2010-03-04 09:38:37 -08:00
Daniel Vetter 04aa38a639 i915 XvMC: switch one_time_state_emit to batchbuffer macros
This is in preparation for real relocatable drm_bo's instead
of memory at a fixed address. By switching to the batchbuffer
macros (like i965 xvmc) we can use the nice OUT_RELOC macro.

Also align the code more with coding-style elsewhere, i.e. bitops
instead of bitfield structures. The bitfield structures are
quite a mess to work with the batchbuffer macros, so they were
getting in the way, anyway.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Carl Worth <cworth@cworth.org>
2010-03-04 09:38:37 -08:00
Daniel Vetter 24d787335a XvMC: kill dead code in i915_xvmc.c
WIP code that hasn't changed for over two years is unlikely to
suddenly start progressing. Drop it. After all, git can easily
resurect it in cases it's needed.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Carl Worth <cworth@cworth.org>
2010-03-04 09:38:37 -08:00
Daniel Vetter 13266b152a XvMC: kill i830_memory in 965 class xvmc
Yes, this breaks binary compat of the struct passed around between
X ddx and the client libXvMC. But we always ship both, so they should
not get out of sync.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Carl Worth <cworth@cworth.org>
2010-03-04 09:38:37 -08:00
Daniel Vetter d39d822cf8 i830_memory: hide as much of the old memory allocator as possible
The only user left of this stuff is the xvmc support.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Eric Anholt <eric@anholt.net>
2010-03-04 09:38:37 -08:00
Daniel Vetter 65267d4bfb i830_memory: switch frontbuffer to drm_intel_bo
Yet another user of i830_memory gone for good.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Eric Anholt <eric@anholt.net>
2010-03-04 09:38:37 -08:00
Daniel Vetter 06f147dc04 i830_memory: switch cursors to drm_intel_bo
Minus one user of i830_memory, some more to go.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Eric Anholt <eric@anholt.net>
2010-03-04 09:38:37 -08:00
Daniel Vetter 23d12e3b08 i830_memory: kill field "pitch"
Totally unused.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Eric Anholt <eric@anholt.net>
2010-03-04 09:38:37 -08:00
Daniel Vetter 2fb8feeb56 i830_memory: rip out field "size"
Use the one in the drm bo instead.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Eric Anholt <eric@anholt.net>
2010-03-04 09:38:37 -08:00
Daniel Vetter 4d4d763b3d i830_memory: kill field "tiling_mode"
Totally unused.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Eric Anholt <eric@anholt.net>
2010-03-04 09:38:37 -08:00
Daniel Vetter d0800d0987 i830_memory: no memory allocations without a bo!
Kill the corresponding !bo path in i830_free_memory.

Also kill another remnant of the pre-kms era in the same file, while I
was looking at the code.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Eric Anholt <eric@anholt.net>
2010-03-04 09:38:37 -08:00
Daniel Vetter 086c0e25ca i830_memory: rename i830_bind_all_memory to reflect code reality
It doesn't bind anything anymore, but does a few random things.
Give it a hopefully vague enough name to cover all cases ;)

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Eric Anholt <eric@anholt.net>
2010-03-04 09:38:37 -08:00
Daniel Vetter 2a989aa057 i830_memory: rip out the old video memory allocator
Besides the debug stuff the went away in the previous patch,
this stuff was totally unused ...

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Eric Anholt <eric@anholt.net>
2010-03-04 09:38:37 -08:00
Daniel Vetter bf83b9a102 i830_memory: kill i830_desribe_allocations
Totally useless debug function from the pre-gem era. No point
to occasionally spam Xorg.log with a bogus "No memory allocations"
message.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Eric Anholt <eric@anholt.net>
2010-03-04 09:38:37 -08:00
Daniel Vetter ff8a1e1cf7 i830_memory: rip out field "offset"
Use the one in the drm bo instead.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Eric Anholt <eric@anholt.net>
2010-03-04 09:38:37 -08:00