Commit Graph

15 Commits

Author SHA1 Message Date
Chris Wilson 735219cd59 uxa: Ensure that we can fallback with all of (src, mask, dst) as GTT mappings
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-12-02 10:42:00 +00:00
Chris Wilson 85d3dc5910 uxa: Reset size limits based on AGP size
The basis for the constraints are what we can map into the aperture for
direct writing with the CPU, so use the size of the mappable region as
opposed to the size of the total GTT.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-12-02 10:22:51 +00:00
Chris Wilson 686018f283 Turn relaxed-fencing off by default for older (pre-G33) chipsets
There are still too many unresolved bugs, typically GPU hangs, that are
related to using relaxed fencing (i.e. only allocating the minimal
amount of memory required for a buffer) on older hardware, so turn off
the feature by default for the release.

Reported-and-tested-by: Knut Petersen <Knut_Petersen@t-online.de>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=36147
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2011-04-12 09:03:01 +01:00
Chris Wilson 049ce4397d Give each user of tiling separate xorg.conf options
So that you can indeed allocate a linear framebuffer if you so desire
without breaking mesa.

Adds:

Section "Driver"
  Option "LinearFramebuffer" "False|True" # default false
EndSection

to xorg.conf

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-03-09 08:37:02 +00:00
Chris Wilson 52b32436b9 Downgrade tiling allocation failure to a warning
We emitted this message as an error even though we fallback and attempt
to allocate a non-tiled framebuffer before failing (with an appropriate
error message).

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-03 19:46:11 +00:00
Chris Wilson 5afc7472b1 intel: don't pass a dangling pointer to GET_PARAM
I fail at cut'n'paste.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-10-29 12:25:23 +01:00
Chris Wilson 6b3ce2e870 uxa: Enable reduced fence sizes for i915
Depends on libdrm 362457715faacd3101929e5f0d8ae250d0ad09df (for
HAS_RELAXED_FENCING define).

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-10-29 11:07:50 +01:00
Chris Wilson 4083197a44 Include a chipset generation number to clarify device specific paths.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-10-07 13:26:07 +01:00
Chris Wilson 40c9d180bf Retry framebuffer allocation if first attempt fails.
If we are tiled, we may fail the allocation due to an EIO and so not
being able to set tiling. Try again with an untiled request in this
case.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-26 23:10:56 +01:00
Chris Wilson 2b96c18165 Enable a shadow buffer and disable GPU acceleration.
An attempt to workaround the incoherency in gen2 chipsets, we avoid
using dynamic reallocation as much as possible.

The first step is to disable allocation of pixmaps using GEM and simply
create them in system memory without a backing buffer object. This
forces all rendering to use S/W fallbacks.

The second step is to allocate a shadow front buffer and assign that to
the Screen pixmap. This ensure that the front buffer remains in the GTT
and pinned for scanout. The shadow buffer will be rendered to in the
normal fashion via the Screen pixmap, and be marked dirty. In the block
handler, the dirty shadow buffer is then blitted (using the GPU) over
the front buffer. This should completely avoid having to move pages
around in the GTT and avoid incurring the wrath of those early chipsets.
Secondly, performance should be reasonable as we avoid the ping-pong
caused by the small aperture and weak GPU forcing software fallbacks.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-08 13:33:37 +01:00
Matt Turner 7f86e5b5da Replace ROUND_* macros with ALIGN.
Signed-off-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-08-22 09:52:54 +01:00
Matt Turner b611bced15 Use ALIGN macro instead of open coding it.
Signed-off-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-08-22 09:52:42 +01:00
Chris Wilson 6fba8c449f Add support for I854.
I spotted that the kernel knew of the I854, but the pci-id was never
added to the ddx.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-07-09 12:12:13 +01:00
Chris Wilson afcd41820d Reduce front buffer stride prior to rejection
If we reject the front buffer because it has too large a stride, repeat
the allocation using untiled for the cases where we can utilize laxer
hardware restrictions.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-07-01 22:10:49 +01:00
Chris Wilson 5c663ce844 Rename common infrastructure to the intel namespace.
After splitting out the i810 driver into its own legacy directory, we
can identify the common routines not as i830 but as intel. This
clarifies the code which *is* i830 specific.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-06-25 13:18:01 +01:00