xf86-video-intel/src
Zhigang Gong e8aa9cedbf uxa/glamor: Remove extraneous flush
When glamor is enabled, a pixmap will not be accessed by UXA's
accelerated functions. Only unaccelerated functions may access those
pixmaps, and before each unaccelerated rendering, it calls
uxa_prepare_access which will do a glFlush. Combined with a flush before
sending to DRI clients, we no longer need to flush after every
operation.

Signed-off-by: Zhigang Gong <zhigang.gong@linux.intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2012-01-03 21:35:03 +00:00
..
legacy i810: kill mmio vga access helpers 2011-10-30 17:46:07 +01:00
render_program src/sna/gen5: Replace the precompiled shaders 2011-11-24 18:24:37 +00:00
scripts Review PLL spreadsheet and update register ranges. 2007-11-13 22:28:22 -08:00
sna sna: Inline checks for over-sized buffers during pixmap creation 2012-01-03 21:35:03 +00:00
xvmc Use malloc/calloc/realloc/free directly 2011-10-29 20:15:11 -07:00
Makefile.am uxa: Depend upon DRI2 not DRI 2011-12-29 08:50:53 +00:00
brw_defines.h Document and use 'legacy' border color mode 2008-10-06 13:22:08 -07:00
brw_structs.h Xv: update SURFACE_STATE & SAMPLER_STATE for Xv on Ivybridge 2011-06-24 09:42:13 +08:00
common.h sna: Reduce and clarify dependencies 2011-11-16 22:15:39 +00:00
i830_3d.c Rename common infrastructure to the intel namespace. 2010-06-25 13:18:01 +01:00
i830_reg.h add BLT ring support 2010-11-01 10:37:51 +00:00
i830_render.c i830: amalgamate consecutive composites into a single primitive 2010-12-23 19:42:19 +00:00
i915_3d.c Rename common infrastructure to the intel namespace. 2010-06-25 13:18:01 +01:00
i915_3d.h Revert "xp:trapezoids" 2010-06-09 10:03:29 +01:00
i915_reg.h i915: Move vertices into a vertex buffer object. 2010-05-24 09:36:23 +01:00
i915_render.c i965: Avoid transform overheads for vertex emit where possible 2011-04-07 15:09:21 +01:00
i915_video.c Compile out UXA if so desired 2011-11-16 22:15:39 +00:00
i965_3d.c render: Refactor to use newly shared pipeline setup code in i965_3d.c. 2011-07-28 15:01:03 -07:00
i965_reg.h snb: implement PIPE_CONTROL workaround 2011-10-11 09:54:17 +02:00
i965_render.c uxa: Remove caching of surface binding location 2011-11-03 20:41:31 +00:00
i965_video.c uxa/video: Clear all state structures before uploading 2011-12-31 17:22:29 +00:00
intel.h Silence uxa-only compilation 2011-12-18 16:25:28 +00:00
intel_batchbuffer.c Compile out UXA if so desired 2011-11-16 22:15:39 +00:00
intel_batchbuffer.h Ensure that the partial batch is flushed upon the blockhandler 2011-05-07 20:04:18 +01:00
intel_display.c uxa: Explicitly check for libdrm_intel in configure 2011-12-17 21:26:34 +00:00
intel_dri.c uxa: Explicitly check for libdrm_intel in configure 2011-12-17 21:26:34 +00:00
intel_driver.c uxa: Explicitly check for libdrm_intel in configure 2011-12-17 21:26:34 +00:00
intel_driver.h Silence uxa-only compilation 2011-12-18 16:25:28 +00:00
intel_glamor.c uxa/glamor: Remove extraneous flush 2012-01-03 21:35:03 +00:00
intel_glamor.h uxa/glamor: Remove dead code. 2012-01-03 21:35:03 +00:00
intel_hwmc.c Include a chipset generation number to clarify device specific paths. 2010-10-07 13:26:07 +01:00
intel_hwmc.h Rename common infrastructure to the intel namespace. 2010-06-25 13:18:01 +01:00
intel_memory.c uxa: Ensure that we can fallback with all of (src, mask, dst) as GTT mappings 2011-12-02 10:42:00 +00:00
intel_module.c uxa: Explicitly check for libdrm_intel in configure 2011-12-17 21:26:34 +00:00
intel_shadow.c Disable BLT for i830 and 845G 2010-11-23 22:29:52 +00:00
intel_uxa.c uxa/glamor: Fallback to new glamor pixmap if failed to create textured pixmap. 2011-12-16 20:23:09 +08:00
intel_video.c uxa: Explicitly check for libdrm_intel in configure 2011-12-17 21:26:34 +00:00
intel_video.h Xv: setup pipeline for Xv on Sandybridge 2010-11-01 08:51:13 +08:00