Commit Graph

185 Commits

Author SHA1 Message Date
Julien Cristau 1c6ea4ab47 Typo fix
Reported by Tomas Carnecky on IRC
2008-10-12 15:17:35 +02:00
Zhenyu Wang bc36608e32 Check display stride limit when allocate front buffer 2008-09-18 10:42:33 +08:00
Eric Anholt 0b4f7b6303 Track move of bufmgr functions to libdrm_intel. 2008-09-09 19:18:10 -07:00
Jesse Barnes 547cf77480 Don't allocate EXA offscreen space if kernel mode setting is active
We'll use GEM alloc & free routines in that case.
2008-08-19 15:45:26 -07:00
Jesse Barnes b8ee31cd80 Remove last TTM bits
Makes it build again with drm#modesetting-gem.
2008-08-16 12:18:01 -07:00
Jesse Barnes 603f48e31b Don't set tiling (yet) if kernel mode setting is active 2008-08-12 18:04:08 -07:00
Jesse Barnes 173b909a71 Make it actually build the kernel stuff if possible
Fixup the kernel stuff to have a slightly better chance of working.  Still need
to fixup the EXA pixmap functions.
2008-08-08 18:11:13 -07:00
Jesse Barnes b1aef6f63c Initial port of kernel modesetting from old intel-kernelmode branch
Thanks airlied!
2008-08-08 11:54:18 -07:00
Keith Packard 12df8f40d2 Use dri_bo for all object allocations, including pixmaps under uxa 2008-08-05 15:40:14 -07:00
Keith Packard 59774e9aca Add UXA - the unified memory acceleration architecture.
This eliminates the cost of EXA migration management while providing full
pixmap allocation control to the driver. The goal is to make something
useful for UMA drivers.
2008-08-05 15:29:50 -07:00
Eric Anholt e9e6b47385 intel-gem: Use new getparam to detect kernel GEM support. 2008-07-30 14:15:57 -07:00
Eric Anholt d77d42e543 intel-gem: Give a better error message if the kernel rejects the tiling mode. 2008-07-26 16:10:05 -07:00
Eric Anholt 286ff63f83 Don't set up the HWS page in GEM mode now that the kernel manages it. 2008-07-21 14:14:22 -07:00
Carl Worth a6ad50402c Merge branch 'master' into drm-gem
Conflicts:

	configure.ac
	src/reg_dumper/Makefile.am
2008-07-17 00:38:54 -07:00
Eric Anholt e9916b9d49 Set tiling state for buffers allocated using GEM. 2008-07-11 18:59:27 -07:00
Zhenyu Wang a34a4e3f64 Fix official name for GM45 chipset 2008-07-03 01:03:14 +08:00
Zhenyu Wang 1cfe769c74 Add support for Intel 4 series chipsets. 2008-06-17 12:39:28 -07:00
Zhenyu Wang 66418cc99c Fix compiler warning when disable xvmc config
(cherry picked from commit df0bbdc7cbb6ff357a81ed28d12e56c9c7d643f7)
2008-06-16 02:52:56 +08:00
Eric Anholt f07acbdaac Require libdrm 2.4.0 always since we need the bufmgr code.
This lets us remove a lot of conditional compile stuff in the DRI case, as
if we're doing DRI and have 2.4.0, we can rely on GEM ioctls existing.
2008-06-12 13:47:35 -07:00
Eric Anholt 754df0aa55 [gem] Chase move of create ioctl from generic to device-specific. 2008-06-11 14:43:38 -07:00
Eric Anholt 339f00e340 [gem] Don't set up the ring in GEM mode, as that'll be handled by the kernel. 2008-06-10 22:50:01 -07:00
Eric Anholt e930c0dc5b Use bufmgr_gem when available instead of the fake bufmgr.
This is a bit unstable still sometimes.
2008-06-10 11:37:04 -07:00
Eric Anholt b2216e7bc2 Use batchbuffers instead of ring emits for general commands.
The batchbuffers are managed using libdrm and bufmgr_fake, and dispatched from
the ring from userland.
2008-06-10 11:37:03 -07:00
Eric Anholt 432d07fb17 Merge branch 'master' into drm-gem 2008-06-05 14:57:18 -07:00
Eric Anholt 3a967b8359 [gem] Note if pinning a buffer fails. 2008-05-28 11:27:06 -07:00
Jesse Barnes 89bb53cc7a Fixup power saving registers
Update clock gating disable bits to match docs and allocate a power context
memory area so that newer chips can save state and power down the render unit.
2008-05-26 09:34:34 -07:00
Eric Anholt ced4b4bb0c [gem] Reduce console spam from debugging. 2008-05-22 22:10:25 -07:00
Keith Packard 9c9a5d0e48 Add check for GEM, use that to enable driver GEM support 2008-05-17 23:23:17 -07:00
Keith Packard 089011daf3 Track name changes in GEM ioctls.
allocate → create
unreference → close
name → flink
2008-05-12 12:18:19 -07:00
Keith Packard 10f1d835b8 Record alignment requirements in mem structure for use by GEM.
GEM needs memory alignment requirements sent at pin time, which is a bit
after the allocation itself. Store the required alignment in the memory
object for later use by pin.
2008-05-12 12:15:09 -07:00
Keith Packard 0741020f37 Set pin alignment for gem on non-965
non-965 tiled frame buffers have fairly strict alignment requirements, 512K
on 8xx and 1MB on 9xx, plus they must be aligned to the size of the
allocation.
2008-05-05 10:17:01 -07:00
Eric Anholt 271abfd0ec Add initial GEM hacks to bring the server up. 2008-05-02 10:06:13 -07:00
Eric Anholt b606278db8 Keep static copies of the 965 render programs in video memory.
This reduces the CPU overhead of memcpying them in every time, for a speedup
in aa24text of around 30%.  This is based on work by Carl Worth which is
in the intel-batchbuffer branch.
2008-04-10 13:37:47 -07:00
Zhenyu Wang b1f358ba97 Disable overlay on new mobile chipset
It's gone, really.
2008-03-28 11:29:40 +08:00
Eric Anholt c02ab432dd Revert "Use mprotect on unbound AGP memory to attempt to catch use while unbound."
While I still like the idea, the mprotect calls themselves are failing on
Linux and causing more trouble than they're worth.

This reverts commit a1612b7728.

Conflicts:

	src/i830_driver.c
	src/i830_memory.c
2008-03-24 13:48:20 -07:00
Zhenyu Wang f425181695 Merge branch 'master' into xvmc 2008-03-13 23:58:56 +08:00
Zhenyu Wang 1c0e495856 Always bind memory after agp aperture allocation
This fixed the crash appearing for Xv buffer memory, which appears
allocation and free happening in stolen memory. We should always
try to bind for stolen memory for correct protect setup, otherwise
we might get fault that stolen memory protect reverted to non-r/w
after previous free and unbind.

Credit goes to Lukas Hejtmanek to identify the real problem of Xv
crash!
2008-03-13 10:15:55 +08:00
Eric Anholt 9a62d3b598 Remove i830+ driver's use of CARD*/INT* types for great justice.
Several uses are actually left, which are determined by the X Server
interfaces we're implementing.
2008-03-11 12:07:52 -07:00
Zhenyu Wang 31654f52b0 Merge branch 'master' into xvmc
Conflicts:

	man/intel.man
	src/i830_driver.c
2008-03-11 14:37:41 +08:00
Jesse Barnes 5915c75422 Enable hardware overlay on 965
Based on Maxim Levitsky's patch for the same.  Many thanks to Maxim for
discovering that this features still works in recent hardware!
2008-03-07 13:18:09 -08:00
Jesse Barnes 6b16cee078 Account for FBC LL cache in memory reservation
When we reserve memory (memory that won't be managed by the kernel) make
sure to reserve space for the FBC LL cache as well.
2008-03-06 19:27:42 +08:00
Jesse Barnes 83a071e2c0 Fix build warnings on 64 bit
Use PRIx32 for printing CARD32 types, and PRIx64 for portably printing uint64_t
types.  Requires the addition of a new include, inttypes.h, to work.  Hope C99
is ok with everybody...
2008-02-05 17:09:19 -08:00
Hong Liu 9536515d77 Allow non-strict free order for bo_list 2008-02-05 09:06:14 +08:00
Mark Kettenis cc1031a834 Bug #14246: Fix biuld on OpenBSD. 2008-01-31 21:02:48 -08:00
Zhenyu Wang aa3ac79759 Don't crash if SW cursor
In case of device option or hw cursor allocation fails.
2008-01-31 18:26:46 +08:00
Jesse Barnes 2e43bec873 Frame buffer compression support on new chipset 2008-01-30 18:59:12 +08:00
Zhenyu Wang bf629466a4 hardware status page initialization rework
Order hardware status page setup more reasonable after
all memory bound, in case new chipset requires non-stolen
page and that could be bound then.

Also clean up drm irq handler install function, and put
first install in starting stage later than status page setup,
so we won't make device cry for uninitialized status page.
2008-01-30 18:55:20 +08:00
Zhenyu Wang 04032dad28 Wrap up chipsets which needs graphics address for status page
Also add support on new chipset.
2008-01-30 18:52:32 +08:00
Zhenyu Wang e56c166ceb remove unnecessary i830_reg.h includes
i830_reg.h only contains 3d engine cmds for 8XX chips.
2007-11-15 18:37:57 +08:00
Zhenyu Wang 0464af581b Merge branch 'master' into xvmc 2007-11-15 11:05:44 +08:00