Commit Graph

2976 Commits

Author SHA1 Message Date
Chris Wilson b5ae596a07 Flush BLT batches before starting an atomic RENDER batch
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-01 11:13:03 +00:00
Zou Nan hai 42363134bd Support BLT acceleration on gen6
Signed-off-by: Zou Nan hai <nanhai.zou@intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-01 10:38:37 +00:00
Zou Nan hai 5bed685f76 add BLT ring support
gen6+ platform has a BLT engine with seperate
command streamer to support BLT commands.

Signed-off-by: Zou Nan hai <nanhai.zou@intel.com>
[ickle: merge trivial conflict]
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-01 10:37:51 +00:00
Xiang, Haihao 6ec3ff134b Xv: don't call intel_wait_for_scanline on Sandybridge
MI_LOAD_SCAN_LINE_INCL command is not available on sandybridge.

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2010-11-01 08:51:55 +08:00
Xiang, Haihao 9e73cbd7ee Xv: enable TextureAdaptor for Sandybridge
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2010-11-01 08:51:51 +08:00
Xiang, Haihao 3213849907 Xv: setup pipeline for Xv on Sandybridge
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2010-11-01 08:51:13 +08:00
Xiang, Haihao 9e4dd27aa8 Xv: fragments for xv on Sandybridge.
Need to update intel-gen4asm to build these fragments

Signed--off-by: Xiang, Haihao <haihao.xiang@intel.com>
2010-11-01 08:46:14 +08:00
Xiang, Haihao e34b3f6ef5 Xv: Send instruction doesn't use implied move when sampling YUV surface
The two fragments will be reused for sampling YUV surface
and send doesn't have implied move on Sandybridge

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2010-11-01 08:45:51 +08:00
Xiang, Haihao 73d4c7d7b8 Xv: set the surface state base address
To prepare for Xv on Sandybridge. It is easy to fill the binding
table without relocation and make sure that the pointer to binding
table only uses bits[15:0].

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2010-11-01 08:38:25 +08:00
Chris Wilson 5afc7472b1 intel: don't pass a dangling pointer to GET_PARAM
I fail at cut'n'paste.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-10-29 12:25:23 +01:00
Chris Wilson 6b3ce2e870 uxa: Enable reduced fence sizes for i915
Depends on libdrm 362457715faacd3101929e5f0d8ae250d0ad09df (for
HAS_RELAXED_FENCING define).

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-10-29 11:07:50 +01:00
Adam Jackson b066ddda31 intel: Listen for hotplug uevents (V3)
This connects the kernel uevent indicating monitor hotplugging to the
RandR notification events so that X applications can be notified
automatically when monitors are connected or disconnected.

This also adds a configuration option to disable hotplug events.

V2: missed a #ifdef HAVE_UDEV around some udev-specific declarations

V3: document Hotplug option in man page

Signed-off-by: Keith Packard <keithp@keithp.com>
2010-10-22 08:35:29 -07:00
Eric Anholt a1c54f6964 Fix violation of gen6 requirements for depthbuffer tiling.
In general, demoting of tiling of DRI2 buffers seems dubious, as we've
got various bits of functionality that won't all work together unless
buffers are tiled as expected.  This just covers one instance of the
problem, caught by assertions in Mesa.

Fixes:
fbo-1d
fbo-d24s8.
glean/readPixSanity
glean/rgbTriStrip
glean/scissor
2010-10-18 14:39:25 -07:00
Chris Wilson 33133a1d38 display: do not report failure for setting unrecognised properties
We need to accept any changes to properties not handled by ourselves -- we
can't validate the changes ourselves. Denying those changes breaks EDID
reporting, for example.

Reported-by: Elvis Pranskevichus <el@prans.net>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-10-17 09:24:22 +01:00
Chris Wilson 8507ef50ba Fix driverName regression for i830 from 4083197a
Reported-by: Stefan Glasenhardt <stefan@glasen-hardt.de>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=30808
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-10-13 09:51:57 +01:00
Chris Wilson 15aab1ef98 Move EDID_COMPLETE_RAWDATA define to intel.h to avoid redifinition warning
The compiler was simply warning that we defined the name prior to
including the original definition, so reorder.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-10-13 09:51:57 +01:00
Stefan Dirsch d2bc2212f8 Make driver compile for 1.6 Xserver series again. Part deux.
Signed-off-by: Matthias Hopf <mhopf@suse.de>
Acked-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-10-12 12:30:41 +02:00
Chris Wilson 5472359d68 dri: Check for pixmap privates before dereferencing them
It is still possible for the pixmap allocator to return a software only
pixmap (i.e. without an associated GEM buffer or intel_pixmap), so check
before dereferencing.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=30707
Reported-by: Matthias Hopf <mhopf@suse.de>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-10-08 15:23:13 +01:00
Chris Wilson 4083197a44 Include a chipset generation number to clarify device specific paths.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-10-07 13:26:07 +01:00
Chris Wilson 1444ea3570 dri+shadow: Only tweak the acceleration of CopyRegion if using shadow.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-10-06 12:45:46 +01:00
Chris Wilson f286891d14 dri: Reattach the fake pixmap for the shadow scanout to the drawable.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-10-06 12:17:14 +01:00
Chris Wilson 707901bf98 uxa: Re-enable acceleration.
A side-effect of discriminating offscreen based on the devPrivate.ptr
was that it broke uxa_finish_access and so after any fallback to s/w on
a Pixmap, it remained in software for the reminder of its life.

Introduce an explicit boolean to mark whether or not hardware
acceleration is enabled for a pixmap (with a GEM buffer).

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-10-06 12:17:14 +01:00
Chris Wilson 54f545e063 Revert "Clear pixmap->devPrivate.ptr [regression in 7c7294e]"
This reverts commit 48b4e224297fa807be0e2bc7a67bf7e94579e8de.

The better fix is to manually mark the pixmap when acceleration is and
is not permitted. Whilst the devPrivate.ptr are invalid upon creation,
it is not worth carring code that serves no purpose.
2010-10-06 12:17:14 +01:00
Chris Wilson d1925deedd Clear pixmap->devPrivate.ptr [regression from 7c7294e]
ModifyPixmapHeader(pixdata = NULL) does not clear the
pixmap->devPrivate.ptr, instead the NULL value is interpreted as meaning
to keep the current value. (This is similar to the interpretation of the
other invalid values like depth=-1 which also mean not to change the
current property). However pixadata=NULL is indeed a valid value, and in
7c7294e, devPrivate.ptr == NULL was used to differentiate a bo pixmap
from a system pixmap. Except that we never did clear the ptr as
intended, and so X would immediately crash.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-10-06 00:23:57 +01:00
Chris Wilson 4bf2182bf9 shadow: Use a cacheable shadow for all generations
Always avoid direct rendering to the uncached scanout buffer,
redirecting all 2D access to the shadow instead. Then for the couple of
platforms where either the BLT is not ready or cannot be trusted (i8xx)
perform the front buffer fixup using the uncached writes from the CPU.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-10-05 09:59:04 +01:00
Chris Wilson b27a521214 shadow: Enable shadow by default on SandyBridge
SandyBridge 2D support is far from complete, so instead of
permanently falling back and always using uncached GTT mapping for
rendering, use the shadow buffer instead.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-10-04 20:36:12 +01:00
Chris Wilson 3e641459f8 shadow: Disable BLT for SandyBridge
The blitting code is incorrect for SandyBridge so disable until
the BLT ring is ready.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-10-04 20:31:01 +01:00
Chris Wilson 7c7294ec00 shadow+dri2: Allow dri2 to be independently enabled with shadow
To enable DRI we create GEM buffers for the client to render into with
hardware acceleration. In order to maintain coherency between any 2D
render operations with the independent 3D clients (this includes the
reading of 2D rasterisation by the direct rendering client, e.g.
compiz using texture_from_pixmap) we need to replace the shadow pixmap
with the GTT mapping. Therefore 2D rendering to a DRI buffer will be to
uncached memory and thus penalised -- but the direct rendering clients
will have full hardware acceleration.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-10-04 20:24:36 +01:00
Chris Wilson 16a5d0ee3c shadow: Map the scanout directly on i8xx
Even with the minimal use of the BLT to copy from the GTT shadow to the
GTT scanout, i830 was still hanging. Just write to the scanout directly.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-10-04 11:21:17 +01:00
Chris Wilson 516d235c5b Split shadow handling routines to their own file.
This is about to get messy, so separate out the shadow from the normal
code.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-10-04 11:10:57 +01:00
Chris Wilson 455f2939a6 Do not claim the PCI device if !KMS
By returning FALSE whilst probing if we can't find a KMS driver, we
allow X to fallback to trying the VESA driver -- rather than failing.

The initial idea for this was by Julien Cristau.

Reported-by: Julien Cristau <jcristau@debian.org>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-10-02 13:32:58 +01:00
Chris Wilson 97fea2fd0c legacy/i810: Remove pVisualConfigs
Completely unused pulling in an undesired glxproto dependency.

Reported-by: Cyril Brulebois <kibi@debian.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=30554
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-10-02 10:05:59 +01:00
Chris Wilson 8784c4f5a1 video: Disable TextureAdaptor for Sandybridge
The acceleration code does not yet exist, so we try to use gen4 shaders
which hangs the chip and makes everybody upset. Disable it until such a
time as support is written for Sandybridge XVideo.

Reported-by: Matthias Hopf <mhopf@suse.de>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=30500
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-10-01 21:45:15 +01:00
Zhenyu Wang 345c963e44 Always use tiling on Sandybridge
Sandybridge requires kind of buffer must be tiling, like depth.
And we would or have all tiling cases handled fine. So not allow
user to turn off tiling on Sandybridge+ may be fine.

Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2010-09-30 11:02:22 +08:00
Chris Wilson 40c9d180bf Retry framebuffer allocation if first attempt fails.
If we are tiled, we may fail the allocation due to an EIO and so not
being able to set tiling. Try again with an untiled request in this
case.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-26 23:10:56 +01:00
Chris Wilson 537e73f3f9 Disable dri2 after forcing fallbacks
If we force fallbacks, then we will only create pixmaps in system
memory, preventing DRI2 from passing valid bo names to the clients. In
this case, they will just fallback to swrast. If we disable DRI2 after
forcing fallbacks (e.g. regenerating after a GPU hang or explicitly
disabled with the shadow buffer) then it is simpler just to disable the
extension and allow mesa to use pure swrast.

Reported-by: Julien Cristau <jcristau@debian.org>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-26 09:50:44 +01:00
Matthias Hopf b84925b9c0 Make driver compile for 1.6 Xserver series again.
Signed-off-by: Matthias Hopf <mhopf@suse.de>
2010-09-22 17:45:06 +02:00
Chris Wilson 99f8d68d3d display: Refactor is_panel()
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-22 12:34:52 +01:00
Krzysztof Halasa bfba6d6148 Allow interlaced modes.
This may not the best method, but it should be a good base on which to
build...

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-21 22:57:36 +01:00
Zhenyu Wang f63c7df686 Disable swap buffer wait on Sandybridge
MI_LOAD_SCAN_LINE_INCL command is not available on sandybridge.
I haven't got reply on any substitution for it, so turn it off for now.

Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2010-09-17 16:39:12 +08:00
Chris Wilson 55b5fe8880 Add alternate pci-id for B43
Confirmed by http://en.wikipedia.org/wiki/Intel_GMA

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=30221
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-16 16:51:59 +01:00
Chris Wilson 08c2caca48 uxa: Apply source clipping to blits
Yes, this should be done in the higher layers. Yes, I have written code
to that. No, it is not ready, hence add the sanity check to the
SRC_COPY_BLT.

This isn't the first report that I've seen, but will be the last.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=30120
Reported-by: rezbit.hex@gmail.com
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-13 01:10:48 +01:00
Chris Wilson ae160d7fbf shadow: Simply modify the Screen pixmap header
This is a slightly less risky strategy than having to remember to update
all pointers to the old Screen pixmap.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-10 13:19:12 +01:00
Chris Wilson 0515256490 display: Free the EDID blob after we copy it to the output, not before.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-10 00:08:58 +01:00
Chris Wilson 2b96c18165 Enable a shadow buffer and disable GPU acceleration.
An attempt to workaround the incoherency in gen2 chipsets, we avoid
using dynamic reallocation as much as possible.

The first step is to disable allocation of pixmaps using GEM and simply
create them in system memory without a backing buffer object. This
forces all rendering to use S/W fallbacks.

The second step is to allocate a shadow front buffer and assign that to
the Screen pixmap. This ensure that the front buffer remains in the GTT
and pinned for scanout. The shadow buffer will be rendered to in the
normal fashion via the Screen pixmap, and be marked dirty. In the block
handler, the dirty shadow buffer is then blitted (using the GPU) over
the front buffer. This should completely avoid having to move pages
around in the GTT and avoid incurring the wrath of those early chipsets.
Secondly, performance should be reasonable as we avoid the ping-pong
caused by the small aperture and weak GPU forcing software fallbacks.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-08 13:33:37 +01:00
Jesse Barnes 0fa4321a76 KMS: initialize backlight support for eDP panels too
Since being able to control the backlight is handy.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2010-09-07 13:56:16 -07:00
Jesse Barnes f56c839f30 KMS: rename LVDS fields to reflect actual usage
These are used for panels, not just LVDS connections, so name them as such.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2010-09-07 13:53:47 -07:00
Jesse Barnes 0d26d950fd KMS: add fake EDID on eDP too
This gives us a few more standard modes on eDP panels with just a simple
fixed timing in the VBT, just like on older, LVDS attached panels.

Fixes FDO bug https://bugs.freedesktop.org/show_bug.cgi?id=30069.

Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Tested-by: Manoj Iyer <manoj.iyer@canonical.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2010-09-07 13:48:59 -07:00
Chris Wilson 273d34fbc4 display: Query current level after finding max value.
The current backlight value is clamped to the valid range [0, max] and
so as we queried the value before setting the max, we forced the current
backlight to 0 and so set it to be zero on initialising the display.

Fixes:

  Bug 30063 - start X will modify brightness value to zero
  https://bugs.freedesktop.org/show_bug.cgi?id=30063

which is a regression due to 38f940dfea.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-07 13:00:23 +01:00
Zhenyu Wang 53767cc0d0 Add more sandybridge graphics device ids
New ids for GT2 and GT2+ on desktop and mobile sandybridge, and
server sandybridge device ids.
2010-09-07 14:17:05 +08:00