Commit Graph

1801 Commits

Author SHA1 Message Date
Eric Anholt aa69018c01 Turn off video debugging now that it appears to work fine. 2006-08-03 19:12:15 -07:00
Eric Anholt d15f871108 Merge branch 'broadwater-video-rehash' into i965
The previous merge wasn't done on a synced-up tree, and missed necessary
changes.
2006-08-03 19:09:10 -07:00
Eric Anholt a79aa0d7b2 Merge branch 'broadwater-video-rehash' into broadwater
Conflicts:

	src/Makefile.am
	src/common.h
	src/i810_driver.c
	src/i810_reg.h
	src/i830.h
	src/i830_accel.c
	src/i830_cursor.c
	src/i830_dri.c
	src/i830_dri.h
	src/i830_driver.c
	src/i830_memory.c
	src/i830_rotate.c
	src/i830_video.c
2006-08-03 18:29:12 -07:00
Alan Hourihane 760021e398 Add current Tungsten Graphics code drop for i965 support. 2006-08-03 17:08:39 -07:00
Eric Anholt d56ffa5f35 Bump PS_MAX_THREADS to 32 now that the program doesn't fail. 2006-08-03 16:03:50 -07:00
Eric Anholt 4525379d95 Make the sampler's payload be the WM payload rather than uninitialized data.
The sampler's payload happens to be in the same format as the WM payload,
though most of the fields are ignored.

This appears to fix the program in the presence of multiple PS threads.
2006-08-03 16:03:15 -07:00
Eric Anholt ad2c70b412 Remove some stale XXX-prefixed comments. 2006-08-03 12:47:19 -07:00
Eric Anholt f9e94c17c5 Set the WM scratch space that we had already allocated.
It appears to be required, even if the kernel doesn't use any scratch space.
2006-08-02 21:18:19 -07:00
Eric Anholt aefa6fdfc5 Clean up GRF allocation (which was wrong at 16-register boundaries).
Also use PS_MAX_THREADS rather than hard-coding 1 thread, and remove the dead
SF_KERNEL_NUM_URB macro.
2006-08-02 21:14:14 -07:00
Eric Anholt 7a64e14624 Crank down the SF allocation and comment on why this is a fine lower limit. 2006-08-02 20:48:13 -07:00
Eric Anholt bc6a2bb757 Remove the clip URB allocation.
Previously, the VS was misconfigured and exceeding its allocation, which the
(unused) clip was providing padding for.
2006-08-02 20:34:57 -07:00
Eric Anholt defe279542 Correct the VS setup, and allocate a correct, minimal number of URB entries.
The VS number of URB entries and URB entry size are always used, even when
the VS is disabled.  Similarly, the cache enable bit is always used.
2006-08-02 20:32:41 -07:00
Eric Anholt b57ccb682c Replace the SF max threads setting with a define for easier tweaking.
Tweak it to 1 for now.
2006-08-02 19:46:15 -07:00
Eric Anholt 82037a1275 Remove CS URB allocation since we don't use any constants. 2006-08-02 19:33:28 -07:00
Eric Anholt 1d45668d7a We only need 3 vertices to fit in the URB, since we only dispatch 3. 2006-08-02 19:18:20 -07:00
Eric Anholt a076d35bed No GS URB allocation is necessary when the function is disabled. 2006-08-02 19:16:03 -07:00
Eric Anholt befa655168 Reduce URB_VS_ENTRY_SIZE to 1 as our vertices are under 8 floats. 2006-08-02 19:11:38 -07:00
Eric Anholt 33acbdca0a Remove the VS kernel and binding table.
The VS URB entries have to remain as they're used to store the VF output which
isn't modified by a VS program.
2006-08-02 19:09:19 -07:00
Eric Anholt aafa48cb85 Fix wm prog to correct the ordering of the Cr and Cb channels. 2006-08-02 18:26:26 -07:00
Eric Anholt bc2c842d93 Allocate space for the 965's state at the end of the video buffer.
Fixes corruption in the first few lines of the video.

Based on 1b506798d98d911be733543da2c40cb451a28912
2006-08-02 18:10:01 -07:00
Eric Anholt 524460ea1f Updated WM kernel to load video and do colorspace conversion. 2006-08-02 17:47:55 -07:00
Eric Anholt ba896c779c Updated grf/urb state for WM. 2006-08-02 17:47:37 -07:00
Adam Jackson e5c572f841 Fix a braino in mode list pruning.
Interpreting the size of the display in centimeters as the size in pixels,
and then clipping the modes list based on that, rarely does what you want.
2006-08-02 20:47:12 -04:00
Eric Anholt 21b62df7c3 Move the WM kernel to a separate file. 2006-08-02 17:36:49 -07:00
Eric Anholt 5d3424492f Replace SF kernel with the one from broadwater-video HEAD. 2006-08-02 17:34:12 -07:00
Eric Anholt 7458a6adb5 Move MAPSURF_XBIT settings into the texture formats structure. 2006-07-31 10:18:18 -07:00
Eric Anholt 7ea74843bb Whitespace cleanup. 2006-07-31 10:18:06 -07:00
Alan Hourihane e71108f1e0 Fix DGA with MergedFB
Turn off rotation support when MergedFB enabled
2006-07-28 10:32:12 +01:00
Alan Hourihane a91a4f95c6 Fix pipe reversal for Xv 2006-07-27 16:11:48 +01:00
Alan Hourihane ac3ad32f66 Calculate allowable refresh rates on the private
mode data for each independent screen in mergedfb.

Lots of other fixes too.
2006-07-27 15:28:42 +01:00
Eric Anholt 30952e58ed Limit drawing to the destination pixmap's boundaries, not the screen's.
This shouldn't matter, as miComputeCompositeRegion shouldn't giving us
anything that would draw outside the bounds, anyway.
2006-07-26 13:42:12 -07:00
Eric Anholt cffd2cd36d Fix hangs when compositing with a mask.
The modify bits in the mask field for sampler/map state appear to actually
be enable bits.  So, prepare the state values in I915TextureSetup,
then write the sampler/map state out all at once in PrepareComposite.
2006-07-26 13:30:55 -07:00
Eric Anholt 96754b822d Fix a couple of typos from code review. 2006-07-26 13:19:12 -07:00
Alan Hourihane e786e2f9f3 When detecting new monitors in mergedfb renew the modepool. 2006-07-26 16:45:38 +01:00
Alan Hourihane 8e6e990db3 Update Xvideo to deal with MergedFB modes. 2006-07-26 10:48:47 +01:00
Alan Hourihane e26f3e30b3 Fix a build problem 2006-07-26 09:17:52 +01:00
Alan Hourihane b919db75d2 Bump to 1.6.1 2006-07-26 09:07:19 +01:00
Eric Anholt 9c93d1498f Oops, partial revert of last commit. Some were obviously not NOOPS. 2006-07-25 21:17:05 -07:00
Eric Anholt 38d1a5e0db Replace some OUT_RING(0)s with OUT_RING(MI_NOOP) to remind me why they're there. 2006-07-25 21:09:12 -07:00
Alan Hourihane fd19b12793 Add mergedfb support to the intel driver with
additional pseudo-Xinerama support.
2006-07-25 11:14:11 +01:00
Wang Zhenyu aec88cf4c6 remove crap blit in UploadToScreen, we should find a more
efficent way and implement blit correctly.
2006-07-24 15:46:19 +08:00
Wang Zhenyu 32f1199937 remove an extra '-' 2006-07-24 15:42:15 +08:00
Wang Zhenyu 02c5c4cd1d add copyright info 2006-07-21 12:54:06 +08:00
Wang Zhenyu 4f0ad33709 fixup segfault in xaa when xaa not initialized in i830WaitSync. 2006-07-21 11:59:04 +08:00
Eric Anholt 914327f40d Disable drawing to PICT_a8, and turn on support for non-extended repeats.
We don't know what COLOR_BUF_8BIT does, so it's disabled for now while we're
stabilizing the code.

The non-extended repeats appear to be working according to the rendercheck
tests on a8 and a8r8g8b8 sources.  Masks continue to hang the card, as before
this change.
2006-07-20 18:01:03 -04:00
Eric Anholt 45cb032e2b Use MT_8BIT_A8 so PICT_a8 expands to (0,0,0,a) not (a,a,a,a) 2006-07-20 18:01:03 -04:00
Eric Anholt fd6d825ae0 Move ss6 setting with other immediate state, and ensure that stencil is off. 2006-07-20 18:01:03 -04:00
Eric Anholt d6d6a44c66 Try to fix up the basic RepeatNormal and RepeatNone support.
With RepeatNone, access outside of the drawable should return 0 alpha values,
which is done by using the border color.  For RepeatNormal, we use the wrap
mode (which requires that we use normalized texture coordinates).
2006-07-20 18:01:03 -04:00
Eric Anholt 2b2173c618 The pixmap's drawable x/y coordinates are always 0, so don't bother using them. 2006-07-20 18:01:02 -04:00
Eric Anholt 9f1cec83e0 The vertex data are all floats, so write the dest coords as floats. 2006-07-20 18:00:29 -04:00