There are some concerns with this, as the DRM will be setting the nonsecure
flag on the batchbuffer, and the server may be submitting some secure-only
commands. It appears to work on the 915GM test system currently.
The EmitFlush in i830_dri.c was added as a pageflipping workaround, and was
noted to not even be sufficient then. There's no reason for it to be there,
so it's removed. After that, we just have to not emit an MI_FLUSH if we
already had, and cursor movement no longer bashes memory manager.
Besides not being #ifdef __linux__ed as requested, some linux kernels break
in exciting new ways when you try to mprotect from PROT_NONE back to
PROT_READ|PROT_WRITE. Yes, there are bugs in the code we're calling in a
bug-exploiting bug workaround.
If you want this workaround for the original bug exposed when moving to
libpciaccess, it's already in libpciaccess.
From the spec, only 965GM and IGD_GM have 128 FIFO entries.
With DSPARB change introduced by commit bd137a, I've got PIPE B
underrun when dual-headed on G35 platform.
It turns out 855 has a different DSPARB layout than 915+. And 945+ have more
FIFO entries, so we have to allocate things differently. So on 855 split the
FIFO evenly again between A & B planes, and do the same on 945, where we have a
larger FIFO. Fixes an issue reported by Daniel Stone with the previous default
value.
Add some debug code to catch FIFO underruns, which are normally bugs (unless
they occur during mode setting) and remove any plane C FIFO allocations, since
we don't use that plane at all. We may eventually need to be a little smarter
about this on platforms that use plane C for the popup.
Update clock gating disable bits to match docs and allocate a power context
memory area so that newer chips can save state and power down the render unit.
GEM needs memory alignment requirements sent at pin time, which is a bit
after the allocation itself. Store the required alignment in the memory
object for later use by pin.
In full_aspect mode, we try to preserve the aspect ratio by adding
either top & bottom or left & right borders. In the letterbox case (top
& bottom borders) we were miscalculating the top border which led to
programming a bad mode. Fix the calculation and bug #15559.
Eric Anholt
Bryce Harrington
Jesse Barnes
Robert Lowery
Tomas Carnecky
Hong Liu
Zhenyu Wang
Alan Coopersmith
Jesse Barnes
Keith Packard
Rémi Cardona
Jesse Barnes