Commit Graph

237 Commits

Author SHA1 Message Date
Eric Anholt aa69018c01 Turn off video debugging now that it appears to work fine. 2006-08-03 19:12:15 -07:00
Eric Anholt d15f871108 Merge branch 'broadwater-video-rehash' into i965
The previous merge wasn't done on a synced-up tree, and missed necessary
changes.
2006-08-03 19:09:10 -07:00
Eric Anholt a79aa0d7b2 Merge branch 'broadwater-video-rehash' into broadwater
Conflicts:

	src/Makefile.am
	src/common.h
	src/i810_driver.c
	src/i810_reg.h
	src/i830.h
	src/i830_accel.c
	src/i830_cursor.c
	src/i830_dri.c
	src/i830_dri.h
	src/i830_driver.c
	src/i830_memory.c
	src/i830_rotate.c
	src/i830_video.c
2006-08-03 18:29:12 -07:00
Alan Hourihane 760021e398 Add current Tungsten Graphics code drop for i965 support. 2006-08-03 17:08:39 -07:00
Eric Anholt d56ffa5f35 Bump PS_MAX_THREADS to 32 now that the program doesn't fail. 2006-08-03 16:03:50 -07:00
Eric Anholt 4525379d95 Make the sampler's payload be the WM payload rather than uninitialized data.
The sampler's payload happens to be in the same format as the WM payload,
though most of the fields are ignored.

This appears to fix the program in the presence of multiple PS threads.
2006-08-03 16:03:15 -07:00
Eric Anholt ad2c70b412 Remove some stale XXX-prefixed comments. 2006-08-03 12:47:19 -07:00
Eric Anholt f9e94c17c5 Set the WM scratch space that we had already allocated.
It appears to be required, even if the kernel doesn't use any scratch space.
2006-08-02 21:18:19 -07:00
Eric Anholt aefa6fdfc5 Clean up GRF allocation (which was wrong at 16-register boundaries).
Also use PS_MAX_THREADS rather than hard-coding 1 thread, and remove the dead
SF_KERNEL_NUM_URB macro.
2006-08-02 21:14:14 -07:00
Eric Anholt 7a64e14624 Crank down the SF allocation and comment on why this is a fine lower limit. 2006-08-02 20:48:13 -07:00
Eric Anholt bc6a2bb757 Remove the clip URB allocation.
Previously, the VS was misconfigured and exceeding its allocation, which the
(unused) clip was providing padding for.
2006-08-02 20:34:57 -07:00
Eric Anholt defe279542 Correct the VS setup, and allocate a correct, minimal number of URB entries.
The VS number of URB entries and URB entry size are always used, even when
the VS is disabled.  Similarly, the cache enable bit is always used.
2006-08-02 20:32:41 -07:00
Eric Anholt b57ccb682c Replace the SF max threads setting with a define for easier tweaking.
Tweak it to 1 for now.
2006-08-02 19:46:15 -07:00
Eric Anholt 82037a1275 Remove CS URB allocation since we don't use any constants. 2006-08-02 19:33:28 -07:00
Eric Anholt 1d45668d7a We only need 3 vertices to fit in the URB, since we only dispatch 3. 2006-08-02 19:18:20 -07:00
Eric Anholt a076d35bed No GS URB allocation is necessary when the function is disabled. 2006-08-02 19:16:03 -07:00
Eric Anholt befa655168 Reduce URB_VS_ENTRY_SIZE to 1 as our vertices are under 8 floats. 2006-08-02 19:11:38 -07:00
Eric Anholt 33acbdca0a Remove the VS kernel and binding table.
The VS URB entries have to remain as they're used to store the VF output which
isn't modified by a VS program.
2006-08-02 19:09:19 -07:00
Eric Anholt aafa48cb85 Fix wm prog to correct the ordering of the Cr and Cb channels. 2006-08-02 18:26:26 -07:00
Eric Anholt bc2c842d93 Allocate space for the 965's state at the end of the video buffer.
Fixes corruption in the first few lines of the video.

Based on 1b506798d98d911be733543da2c40cb451a28912
2006-08-02 18:10:01 -07:00
Eric Anholt 524460ea1f Updated WM kernel to load video and do colorspace conversion. 2006-08-02 17:47:55 -07:00
Eric Anholt ba896c779c Updated grf/urb state for WM. 2006-08-02 17:47:37 -07:00
Eric Anholt 21b62df7c3 Move the WM kernel to a separate file. 2006-08-02 17:36:49 -07:00
Eric Anholt 5d3424492f Replace SF kernel with the one from broadwater-video HEAD. 2006-08-02 17:34:12 -07:00
Alan Hourihane e26f3e30b3 Fix a build problem 2006-07-26 09:17:52 +01:00
Alan Hourihane b919db75d2 Bump to 1.6.1 2006-07-26 09:07:19 +01:00
Eric Anholt 84805167ab Convert i915 rotate code to the new fragment program API. 2006-07-18 18:27:10 -04:00
Eric Anholt 5176d62ba5 Add an API for programming i915 fragment programs. 2006-07-18 18:24:28 -04:00
Eric Anholt 148ef9bdd9 Convert magic numbers to symbolic names in i915 rotate code.
This doesn't cover the fragment shader yet, which we need to make a sensible
set of macros for (at least the basic bits).

Reviewed by:	md5
2006-07-18 17:11:34 -04:00
Alan Hourihane 16d6263e65 whoops, reverse part of that. 2006-07-16 20:39:52 +01:00
Alan Hourihane 2f50f6d1b1 move ContextMem out of XF86DRI 2006-07-16 20:17:38 +01:00
Alan Hourihane b1c2ea6535 whoops, revert some unnecessary changes 2006-07-11 08:13:30 +01:00
Alan Hourihane 8a44a7acfc Merge branch 'master' of git+ssh://git.freedesktop.org/git/xorg/driver/xf86-video-intel 2006-07-11 07:41:27 +01:00
Alan Hourihane 584b544987 Add an additional check before rotating 2006-07-11 07:40:40 +01:00
Eric Anholt e7723a4e57 Merge branch 'origin' 2006-06-26 16:04:33 +02:00
Eric Anholt 5111b88348 Turn on extra warning flags for GCC, and clean up the resulting fallout. 2006-06-26 14:53:10 +02:00
Alan Coopersmith dae9cb7712 Provide definitions of __FUNCTION__ for non-gcc compilers 2006-06-22 15:07:16 -07:00
Alan Hourihane 5a1b68993f Fix build without DRI 2006-06-21 08:41:16 +01:00
Matthieu Herrb 16b310823b Fix build without DRI 2006-06-21 00:12:27 +02:00
Keith Packard 8a6edba332 Set vblank interrupt configuration to match pipe configuration
New i915 drm ioctl (in version 1.5) allows the X server to select
which pipe drives vblank interrupts. Use this to drive from the 'preferred'
pipe. Yes, per-window vblanks would be nice in a shared fb environment.
Maybe someday.
(cherry picked from 2fb375b665 commit)
2006-06-19 13:47:28 -07:00
Alan Hourihane a73ab7f0e6 additions for rotation fixes 2006-06-19 11:35:42 +01:00
Alan Hourihane 1fe3dd38eb Set some invarient state, cures some problems with
rotation at startup.

This mimicks the 3D drivers setup.
2006-06-19 11:27:28 +01:00
Alan Hourihane 3592b432b4 fix 8bpp & 16bpp rotation modes for i8xx
series chips
2006-06-13 21:42:53 +01:00
Alan Hourihane a50610b771 Use 800x600 mode to double check 2006-06-12 13:53:20 +01:00
Alan Hourihane f02268b209 Don't rely on register check to find out
if we're resuming - it's not reliable.

But then, neither is the BIOS, but it's
the best we can hope for until Eric's work
is complete.

Try setting another mode to cater for some
broken BIOS' too.
2006-06-12 12:16:58 +01:00
Alan Hourihane 672c3d18db Only mark rotation flags after initial screen setup.
Fixes bug #7053
2006-06-12 10:02:06 +01:00
Dave Airlie 6812b53820 intel: fix VT switch DRI locking
The DRI locking is incorrect at VT switch, due to reference counting
inside the driver. Just call the DRI directly.
2006-06-02 12:22:14 +10:00
Keith his master's voice Packard 3f158fd610 Nice texture coordinate gradient, broken slightly in y 2006-05-29 18:05:57 -07:00
Keith his master's voice Packard bb0ad04d46 Ok, finally something sensible up on the screen.
Replace PS kernel with constant data source (pink).
Dodge g0/g1 so URB data doesn't land on top of thread data.
Flip source/dest coordinates (dunno why they're fetched this way).
2006-05-28 22:59:58 -07:00
Keith his master's voice Packard ddf3e5b273 Using tiny rectangle, still locks up in pixel shader program somehow 2006-05-28 21:03:39 -07:00