This is the intel video driver patch for a new chip, which is G33-like
and has some clocking setting related register changes. This patch adds
the pci id and DPLx/FPx register changes.
The gtt tool should just work to me, as the chip hasn't any changes
against G33 on this side.
Signed-off-by: Shaohua Li <shaohua.li@intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
In debugging the frame buffer resize code, I needed to see what the server
was doing to the fence registers, so I added this debug code. Seems useful
enough to include it.
Signed-off-by: Keith Packard <keithp@keithp.com>
This eliminates the cost of EXA migration management while providing full
pixmap allocation control to the driver. The goal is to make something
useful for UMA drivers.
The VGA register dumping code was leaving ARX in data mode rather than index
mode, which could cause problems for later software accessing AR* registers.
Fix it to make sure it's in index mode when we're done.
Fixes#14434.
Use PRIx32 for printing CARD32 types, and PRIx64 for portably printing uint64_t
types. Requires the addition of a new include, inttypes.h, to work. Hope C99
is ok with everybody...
LVDS mode changes how the PLL works in fairly dramatic ways; the debug code
wasn't properly accounting for those differences resulting in fairly bogus
debug output.
Be sure to check G33 chip type in:
- sdvo output
- Y-major tile
- crt detect
- and xaa composite
Sorry for that I should have fixed them very earlier...
- Use the existing single/dual-channel state when available, as changing it
doesn't appear to work out.
- Set the power state of the CLKB and B0-B3 pairs according to whether
choose to go dual-channel or not.
- Restore the LVDS register at the appropriate point (before DPLLs are
re-programmed.
This gets correct clocks detected on most harware. The SSC is always assumed
to be 66Mhz, which may not be true, but we'll fix that when we find example
hardware.
This includes not reporting some fields on hardware where those bits are
reserved, correcting one of the hardware error bit numbers, and reducing
the severity of the debugging output warnings.